BUT11AF datasheet, BUT11AF pdf, BUT11AF data sheet, datasheet, data sheet, pdf, Fairchild Semiconductor, NPN Silicon Transistor. BUT11AF. GENERAL DESCRIPTION. High-voltage, high-speed glass- passivated npn power transistor in a SOT envelope with electrically. BUT11AF NPN Silicon Transistor. Absolute Maximum Ratings TC=25°C unless otherwise noted. Symbol VCBO Parameter Collector-Base Voltage: BUT11AF.

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August 8 Rev 1. August 7 Rev 1.

Datasheet «BUT11AF»

Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. Oscilloscope display for Datzsheet.

SOT; The seating plane is electrically isolated from all terminals. No liability will be accepted by the publisher for any consequence of its use.


BUT11AF Datasheet PDF –

Application information Where application information is given, it is advisory and does not form part of the specification. Extension for repetitive pulse operation.

Typical base-emitter and collector-emitter saturation voltages.

August 2 Rev 1. Bjt11af power derating and second breakdown curves. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied.

Forward bias safe operating area. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages but11ag from such improper use or sale. Product specification This data sheet contains final product specifications. Region of permissible DC operation.

Test circuit resistive load.

Stress above one or more of the limiting values may cause permanent damage to the device. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.


Test circuit for VCEOsust. UNIT – – 1. August 4 Ptot max and Ptot peak max lines. Switching times waveforms with resistive load. Test circuit inductive load. Observe the general handling precautions for electrostatic-discharge sensitive devices ESDs to prevent damage to MOS gate oxide.

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Exposure to limiting values dagasheet extended periods may affect device reliability. Switching times waveforms with inductive load. Typical DC current gain. Typical base-emitter saturation voltage. Reverse bias safe operating area. Refer to mounting instructions for F-pack envelopes.